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Data type system

Logic

Logic types represent the basic element of computation. This is either a boolean value, or a 4 state logic value (depending on the simulator).

Nail 

logic foo;
Chisel 

val foo = Bool();
SystemVerilog 

logic foo;

Arrays

Array types represent a repeating data elements.

Nail 

logic[10] foo;
Chisel 

val foo = Vec(10, Bool());
SystemVerilog 

logic[9:0] foo;

Structs

Structures are also present in Nail. We use the keyword “structdef” in Nail to avoid confusion with the struct keyword in lean4/rocq.

Nail 

structdef my_struct {
  logic a;
  logic[32] b;
}
Chisel 

class MyStruct extends Bundle {
  val a = Bool()
  val b = Vec(32, Bool())
}
SystemVerilog 

typedef struct packed {
  logic a;
  logic[31:0] b;
} my_struct;

Parametric structs are also supported in Nail. Note that SystemVerilog does not have native parametric structs: the work around for this is to define a struct within a parametric interface.

Nail 

template<int N>
structdef my_param_struct {
  logic a;
  logic[N] b;
}
Chisel 

class MyParamStruct(n: Int) extends Bundle {
  val a = Bool()
  val b = Vec(n, Bool())
}
SystemVerilog 

interface my_interface #(
    parameter int N = 32
);
  typedef struct packed {
    logic a;
    logic[N-1:0] b;
  } my_struct_t;
endinterface